At Avnet, you’ll find development kits for a wide range of applications and varying levels of complexity. You’ll also gain access to documentation, reference designs and training material for kits for every type of project, from entry-level designs to highly complex solutions with embedded vision, test and measurement, and industrial IoT.
AuBoard 15P FPGA Development Kit
The AUBoard 15P provides the flexibility and versatility for engineers to experiment with and learn the AMD Artix UltraScale+ ™ architecture. The feature rich AU15P device features 170K programmable logic cells and 12 GTH multi-gigabit transceivers as well as 576 DSP slices and 7.6 Mb of on-chip RAM. The board also features 2GB of ISSI DDR4 and non-volatile configuration and boot from the 512Mb of ISSI QSPI Flash. A Microchip PHY enables the 10/100 Ethernet interface. A microUSB port provides on-board JTAG/UART access. A Renesas clock generator and ECS crystal oscillators provide clocking to the AU15P device, GTH transceivers, JTAG, and communication interfaces. All 12 GTH transceivers are brought out to SFP+ 10 GbE Ethernet (1), HDMI 2.0 Rx & Tx (3), and PCIe end point (4) interfaces and FMC (4) I/O expansion. A combination of slide switches, push buttons, and LEDs (red and RGB) allow user interaction with the board.
A temperature sensor from STMicroelectronics adds environmental data to the system. Additionally, 80 FPGA I/Os are exposed through the Samtec connectors for FMC LPC high-speed expansion and one Click Board™ site. The board is powered from a 60W power supply and Renesas and TDK power devices. With a Vivado-enabled board definition file and PetaLinux BSP, you will be up and running in no time! Whether you want to explore bare metal, RTOS, or Linux software, the AUBoard 15P will give you a solid base foundation to experiment.
VE2303 Development Kit
The VE2302 Development Kit (DK)is specifically designed to evaluate Avnet’s VE2302 System-on-Module (SOM) and AI Edge IO Carrier Card. With a VE2302 DK a designer can assess the capabilities of the AMD Versal™ AI Edge Adaptive SoC with a combination of versatile peripherals. This combination helps designers to kick-start product development giving access to the feature set of the Versal AI Edge Adaptive SoC.
The VE2302-DK uses the 104 XPIO, 22 HDIO, 13 PMC MIO, 12 LPD MIO and 8 GTYP transceivers that are available from the VE2302 SOM via three 160-pin Samtec AcceleRate® HD High-Density 4-Row connectors that mount to the AI Edge IO Carrier Card. The first Samtec AcceleRate HD connector on the AI Edge IO Carrier Card is mapped to various processor-based interfaces such as USB2.0, Gigabit Ethernet, CAN, microSD, push buttons, and LEDs. This connector also contains support interfaces such as the JTAG, UART, and SYSMON. The last interface of this connector comes from an HDIO bank on the VE2302 device and is mapped to one HSIO TXR2 expansion site. The second connector on the AI Edge IO Carrier Card is mapped to six 22-pin MIPI interfaces (CSI or DSI), a Digilent Pmod™ Type-1 compatible interface, push buttons, dipswitch, and LEDs using XPIO banks from the VE2302 device. The last Samtec HD connector is dedicated to GTYP transceiver interfaces. The GTYP transceivers are mapped to HDMI 2.1 compliant TX and RX interfaces, 2 zSFP+ interfaces, and the HSIO TXR2 expansion site transceiver location. These GTYP interfaces have clocks provided by an on-board programmable clock generator from Renesas.
5G mmWave PAAM Development Platform
Avnet and Fujikura have created a leading edge 5G FR2 phased array antenna development platform for mmWave frequency bands. This platform enables developers to quickly create and prototype advanced 5G mmWave systems using AMD Xilinx’s Zynq® UltraScale+™ RFSoC Gen3 and Fujikura’s FutureAcess™ Phased Array Antenna Module (PAAM). Developers are able to configure and control the digital and RF settings using Avnet’s proven RFSoC Explorer® software. This combination of leading-edge components and software allows developers to quickly prototype with Fujikura’s compact PAAM and AMD Xilinx’s RFSoC. By creating a highly flexible, integrated development platform targeting 5G systems, both Avnet and Fujikura are seeking to simplify prototyping and development by integrating key elements of a 5G system from RF to baseband.
The PAAM platform consists of the Fujikura PAAM daughtercard, the AMD ZCU208 EVK, and the Avnet RFSoC Explorer MATLAB application.
K24 Development Kit
The K24 Development Kit is a combination of an AMD KRIA K24 system on module (reduced feature), and an Avnet Embedded K24 IO Carrier Card with an Out-of-Box reference design, downloadable Hardware User Guide, Board Definition File (BDF), and Board-Support-Package (BSP) for engineers to design with the K24 SOM.
The K24 IO Carrier Card leverages the commercial or industrial grade AMD KRIA K24 SOM based on a custom Zynq UltraScale+ MPSoC. The K24 SOM provides an embedded processing system (PS) with tightly integrated programmable logic and a rich set of configurable I/O capabilities. The SOM hardware features include 2GB 32-bit wide, 1066 Mb/s LPDDR4 memory, 512Mb QSPI, 32GB eMMC (not included with kit), 64Kb EEPROM non-volatile memory. The IO Carrier Card also features other boot options beyond the SOM’s integrated memory such as the microSD card slot or the affordable DP/eMMC HSIO expansion modules that can be purchased separately.
RFSoC Gen3 Kit for mmWave
The Avnet Wideband mmWave Radio Development Kit for RFSoC Gen-3 is ideal for prototyping RF applications in mmW bands including 5G NR FR2, wireless backhaul, as well as K/Ka band radar and SATCOM. This platform combines the Otava DTRX2 Dual Transceiver mmWave Radio Card - jointly developed by Otava and Avnet - with the AMD Xilinx Zynq® UltraScale+ ™ RFSoC ZCU208 Evaluation Kit.
Explore the entire signal chain from millimeter wave RF in the 19 to 31 GHz range to IF sampling in RFSoC Gen-3 data converters reaching 6 GHz. Native connection to MATLAB® and Simulink® is provided by Avnet's RFSoC Explorer®, featuring graphical control of the platform and intuitive APIs for programmatic access.
Ultra96 V2
The Ultra96-V2 updates and refreshes the Ultra96 product that was released in 2018. Like Ultra96, the Ultra96-V2 is an Arm-based, AMD Xilinx Zynq UltraScale+ ™ MPSoC development board based on the Linaro 96Boards Consumer Edition (CE) specification. Ultra96-V2 is available in more countries around the world as it has been designed with a certified radio module from Microchip. Additionally, Ultra96-V2 is available in both commercial and industrial temperature grade options. Additional power control and monitoring is possible with the included Infineon Pmics.
Like Ultra96, the Ultra96-V2 boots from a microSD card (not included). Engineers have options of connecting to Ultra96-V2 through a Webserver using integrated wireless access point capability or to use the provided PetaLinux desktop environment which can be viewed on the integrated Mini DisplayPort video output. Multiple application examples and on-board development options are provided as examples.
ZuBoard1CG
The ZUBoard 1CG provides the flexibility and versatility for engineers to experiment with and learn the AMD Zynq ® UltraScale+ ™ architecture. The affordable ZU1CG device features 81K programmable logic cells with a Dual-core Arm ® Cortex ®-A53 MPCore ™ and Dual-core Arm Cortex-R5F MPCore, as well as cache and on-chip memory. The board also features 1GB of ISSI LPDDR4 with non-volatile boot options in the 256Mb ISSI QSPI Flash or a microSD card slot.
Microchip PHYs enable both 10/100/1000 Ethernet and USB 2.0 Host. A microUSB port provides on-board JTAG/UART access. Microchip oscillators and ECS crystals provide clocking to the ZU1 device, the on-chip real-time clock, JTAG, and communication interfaces. Power the board through USB-C with a Microchip controller and TDK μPOL ™ power modules. A combination of slide switches, push buttons, mono- and RGB-LEDs allow user interaction with the board. Both temperature and pressure sensors from STMicroelectronics add environmental data to the system. Additionally, all four ZU+ PS GTR transceivers, 18 PS MIO, and 69 PL I/Os are exposed through three Samtec expansion connectors and one Click Board ™ sites
