New Product Introduction

NPI Body

STMicroelectronics STM32MP157 MPU with Arm Dual Cortex-A7 650 MHz

STM32MP157 microprocessors are based on the flexible architecture of a Dual Arm® Cortex®-A7 core running at 650 MHz and Cortex®-M4 at 209 MHz

STM32MP157 microprocessors are based on the flexible architecture of a Dual Arm^®Cortex^®-A7 core running at 650 MHz and Cortex^®-M4 at 209 MHz combined with a dedicated 3D graphics processing unit (GPU) and MIPI-DSI display interface and a CAN FD interface.

The STM32MP157 3D OpenGL ES 2.0 graphics engine works together with an optimized software stack design for industry-standard APIs with support for Android™ and Linux^®embedded development platforms.

The security option includes Secure Boot, TrustZone^®peripherals and an active tamper-detect feature.

Key features

32-bit dual-core Arm Cortex-A7, 650 MHz and 32-bit Arm Cortex-M4, 209 MHz
Secure boot, TrustZone^®peripherals, active tamper
Cortex^®-M4 resources isolation
3D GPU: Vivante^®- OpenGL^®ES 2.0

Additional features

32-bit dual-core Arm^® Cortex^®-A7L1 32-Kbyte I / 32-Kbyte D for each core
256-Kbyte unified level 2 cache
Arm^®NEON™ and Arm^®TrustZone^®
32-bit Arm^®Cortex^®-M4 with FPU/MPUUp to 209 MHz (Up to 703 CoreMark^®)
External DDR memory up to 1 Gbyte
up to LPDDR2/LPDDR3-1066 16/32-bit
up to DDR3/DDR3L-1066 16/32-bit
708 Kbytes of internal SRAM: 256 KB of AXI SYSRAM + 384 KB of AHB SRAM + 64 KB of AHB SRAM in backup domain and 4 KB of SRAM in backup domain
Dual mode Quad-SPI memory interface
Flexible external memory controller with up to 16-bit data bus: parallel interface to connect external ICs and SLC NAND memories with up to 8-bit ECC
Secure boot, TrustZone^®peripherals, active tamper
1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os)
POR, PDR, PVD and BOR
On-chip LDOs (RETRAM, BKPSRAM, DSI 1.2 V, USB 1.8 V, 1.1 V)
Backup regulator (~0.9 V)
Internal temperature sensors
Low-power modes: Sleep, Stop and Standby
LPDDR2/3 retention in Standby mode
Controls for PMIC companion chip
Total current consumption down to 6 μA
Up to 37 communication peripherals
2 × CAN controllers supporting CAN FD protocol, out of which one supports time-triggered CAN (TTCAN)
3 × SDMMC up to 8-bit (SD / e•MMC™ / SDIO)
10/100M or Gigabit Ethernet GMAC
LCD-TFT controller, up to 24-bit // RGB888
MIPI^®DSI 2 data lanes up to 1 GHz each
AES 128, 192, 256, TDES
HASH (MD5, SHA-1, SHA224, SHA256), HMAC
3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user