Octavo OSDZU3 System-in-Package
OSDZU3 - Performance and flexibility of the Xilinx ZU3 MPSoC without the complexity
The OSDZU3 is the fastest and most flexible way to develop a system around the Xilinx Zynq UltraScale+ MPSoC. It allows you to harness the performance of the ZU3 MPSoC, while removing the complexities without sacrificing flexibility.
The OSZU3 integrates the Xilinx ZU3 Zynq UltraScale+ MPSoC, with 2GB (16Gb) LPDDR4, Power Management and other required components into a single BGA Package that is almost 60% smaller than an implementation in discrete chip-down components. This integration reduces your design effort by months allowing you to get to market faster or spend time adding more features to your product.
We are currently making the OSDZU3 available to Beta Customers and plan to have it available for general sampling in the first half of 2022 and in production in the second half of 2022.
Request Beta Access
Features
- Integrated into a single BGA Package:
- ZU3 Xilinx Zynq UltraScale+ MPSoC
- 2GB (16Gb) LPDDR4
- 2x Infineon IRPS5401 PMICs
- 2x LDO
- QSPI
- 4KB EEPROM
- 2x MEMs Oscillators
- Passives
- Xilinx ZU3 MPSoC Features:
- 4x Arm® Cortex®-A53 up to 1.2GHz
- 2x Arm® Cortex®-R5F up to 500MHz
- Arm® Mali®-400 Based GPU
- 154K System Logic Cells
- 141K Flip-Flops
- 71K CLB LUTs
- 360 DSP Slices
- 7.6 Mb Block RAM
- Access to all ZU3 Peripherals
- PCIe® Gen2, USB3.0, SATA 3.1, DisplayPort, Tri-mode Gigabit Ethernet
- USB 2.0, SD/SDIO, UART, CAN 2.0B, I2C, SPI
- 78x MIO
- 96HD I/o, 156 HP I/O
- Power In: Single 4.5V-5.5V Input
- Power Out: 2x Programmable Buck
- Access to All Power Domains, able to leverage all power modes
- 40mm x 20.5mm BGA Package
- 600 Ball (20 x 30 Grid) 1mm Pitch BGA
Block diagram
silica content library/npi/2022/octavo-osdzu3
Octavo OSDZU3 System-in-Package | Avnet Silica
