AMD Zynq® UltraScale+™ RFSoCs
Zynq® UltraScale+™ RFSoCs are integrating a comprehensive RF analog-to-digital signal chain
Zynq® UltraScale+™ RFSoCs integrate multi-giga-sample RF data converters and soft-decision forward error correction (SD-FEC) into a SoC architecture. Complete with an ARM® Cortex™-A53 processing subsystem, UltraScale+ programmable logic, and the highest signal processing bandwidth in a Zynq UltraScale+ device, the new family provides a comprehensive RF signal chain for wireless, cable access, test & measurement, early warning / radar, and other high performance RF applications.
| Value |
Features |
|
System Performance and Throughput
|
- Eliminates discrete ADCs and DACs for reduced footprint
- Scalable growth path for increasing RF channel-count
- Integrated SD-FEC integrated cores
|
|
Unmatched Integration, Performance, and Power
|
- Reduces power by removing ADC/DAC components
- Eliminates FPGA-to-Analog interface power
- Meets stringent 5G & DOCSIS3.1 LDPC FEC thermal requirements
- 80% more power efficient SD-FEC vs. a soft implementation
|
|
Proven Productivity
|
- RF-design in the digital domain for greater flexibility
- Eliminates difficult JESD204B/C analog interface design
- Simplified system and PCB design with fewer components
- Unified control for digital beamforming & signal conditioning
|
silica content library/npi/2018/xilinx-zynq-rfsoc
AMD Zynq® UltraScale+™ RFSoCs | Avnet Silica
