AMD Embedded Tour 2025
26 Jun 2025 - 26 Jun 2025
Stuttgart, Germany
Join Avnet Silica for the AMD Embedded Tour – Stuttgart
Unlock new possibilities in embedded design with a one-day event dedicated to engineers and innovators. Connect directly with AMD and Avnet Silica experts, explore cutting-edge solutions from strategic partners, and gain fresh perspectives from peers in your field.
Whether you’re focused on AI at the edge, system-level optimisation, or next-gen compute architectures, this event is built to help you move faster, smarter, and with greater design freedom.
Why Attend?
You’ll tackle challenges like:.
- Simplifying compute and acceleration integration
- Maximising edge performance under power constraints
- Navigating toolchains and development workflows that fit your needs
Choose from two focused tracks and explore AMD’s embedded portfolio—x86, FPGA, adaptive SoCs, and powerful design tools—tailored for real-world workloads.
Seats are limited – secure your spot today.
Date & Time
26 June 2025
Location
Design Offices Stuttgart Eberhardhöfe, Eberhardstraße 65, 70173 Stuttgart, Germany
Agenda
| 09:00-09:20 | Arrival and Registration Grab your badge, coffee, and get connected. |
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| 09:20-09:30 | Welcome and Opening Remarks Setting the stage for a day of innovation, insight, and engineering excellence. Markus Schulze, AMD |
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| 09:30-10:30 | AMD Embedded Portfolio - FPGAs, Adaptive SoCs and x86 CPUs Overview of the AMD Embedded portfolio including the newest FPGA, adaptive SoC families, Embedded x86 CPUs and the AI and software solutions. Thilo Ohlemueller, AMD |
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| 10:30-11:30 | AMD: The Performant, Predictable and Proven Choice Have you chosen the lowest cost or highest performance FPGA only to struggle with timing closure, power consumption, or some other avoidable problem you didn’t anticipate? Intangibles such as development tool quality, fabric efficiency, packaging, and Hard IP can make all the difference. Attend this presentation and discover why AMD FPGAs and adaptive SoCs are the Performant, Predictable, and Proven choice. Thilo Ohlemueller, AMD |
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| 11:30-12:00 | Coffee break | |
| Track 1 | Track 2 | |
|---|---|---|
| 12:00-13:00 | AMD Cost Optimised Portfolio Gain the insights and expertise to confidently choose the right AMD cost-optimised solution for your design. Thilo Ohlemueller, AMD |
Introduction to Versal AIE for DSP Expand your AI Engines architecture knowledge with an in-depth overview of the development cycle and methodology with a special emphasis on DSP algorithms. We’ll also demonstrate integration of the AI Engines subsystem into the Versal platform, illustrating how this amalgamation enhances the overall system efficiency. Jerry Armao, AMD |
| 13:00-14:00 | Lunch and Networking Explore live demos, meet AMD partners, and discuss real-world use cases with peers and experts. |
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| 14:00-15:00 | Why Choose AMD Embedded x86 Options and tools for building x86 based embedded solutions and illustration of the Embedded product support flow. Michael Saleab, AMD |
Cyber Resilience Act / Security What engineers need to know about the CRA and building secure, compliant embedded systems. Laurent Lagosanto, Avnet Silica |
| 15:00-16:00 | Advantech empowers AI @ The Edge Uncover key elements for deploying AI at the Edge with AMD solutions, including how the Edge SDK accelerates development and benchmarking for AI models. Hagen Schmidt, Advantech |
Why Security Matters Deep-dive into security measures and a live demo of AMD KRIA KV260. Marco Hoefle, Avnet Silica |
| 16:00-16:30 | Wrap-Up, Takeaways & Raffle Key insights from the day — plus a chance to win some cool prizes in our raffle! |
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Event in collaboration with:
We’ll be joined by our partners:
