AMD Embedded Tour 2025
05 Jun 2025 - 05 Jun 2025
Warsaw, Poland
Join Avnet Silica for the AMD Embedded Tour – Warsaw
Unlock new possibilities in embedded design with a one-day event dedicated to engineers and innovators. Connect directly with AMD and Avnet Silica experts, explore cutting-edge solutions from strategic partners, and gain fresh perspectives from peers in your field.
Whether you’re focused on AI at the edge, system-level optimisation, or next-gen compute architectures, this event is built to help you move faster, smarter, and with greater design freedom.
Why Attend?
You’ll tackle challenges like:.
- Simplifying compute and acceleration integration
- Maximising edge performance under power constraints
- Navigating toolchains and development workflows that fit your needs
Choose from two focused tracks and explore AMD’s embedded portfolio—x86, FPGA, adaptive SoCs, and powerful design tools—tailored for real-world workloads.
Seats are limited – secure your spot today.
Date & Time
05 June 2025
Location
The Westin Warsaw, al. Jana Pawła II 2, 00-854 Warszawa, Poland
Agenda
| 09:00-09:30 | Arrival and Registration Grab your badge, coffee, and get connected. |
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| 09:30-10:00 | Welcome and Opening Remarks Setting the stage for a day of innovation, insight, and engineering excellence. Shmulik Preil, AMD |
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| 10:00-11:00 | AMD Embedded Portfolio - FPGAs, adaptive SoCs and x86 CPUs An overview of the AMD Embedded portfolio including the newest FPGA, adaptive SoCs families, Embedded x86 CPUs and the AI and software solutions. Explore the AMD embedded offerings and which AMD solution can be used for your next project. Maxime Rocca, AMD |
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| 11:00-12:00 | AMD: The Performant, Predictable and Proven Choice Have you chosen the lowest cost or highest performance FPGA only to struggle with timing closure, power consumption, or some other avoidable problem you didn’t anticipate? Intangibles such as development tool quality, fabric efficiency, packaging, and Hard IP can make all the difference. Attend this presentation and discover why AMD FPGAs and adaptive SoCs are the Performant, Predictable, and Proven choice. Maxime Rocca, AMD |
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| 12:00-13:00 | Lunch and Networking Explore live demos, meet AMD partners, and discuss real-world use cases with peers and experts. |
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| Track 1 | Track 2 | |
|---|---|---|
| 13:00-14:00 | AMD Cost Optimised Portfolio Explore how the AMD cost-optimised portfolio enables scalable, efficient solutions for industrial deployments. Maxime Rocca, AMD |
Introduction to Versal AIE for DSP Expand your AI Engines architecture knowledge with an in-depth overview of the development cycle and methodology with a special emphasis on DSP algorithms. We’ll also demonstrate integration of the AI Engines subsystem into the Versal platform, illustrating how this amalgamation enhances the overall system efficiency. Marco Escajadillo Calizaya, AMD |
| 14:00-15:00 | Why Choose AMD Embedded x86 Options and tools for building x86 based embedded solutions and illustration of the Embedded product support flow. Michael Saleab, AMD |
Cyber Resilience Act - a new EU regulation In a world where every connected device is a potential attack surface, Europe is changing the rules. It’s time to code, build, and innovate — with security from line one. Dariusz Tekla, Avnet Silica |
| 15:00-15:15 | Coffee break | |
| 15:15-16:15 | Advantech empowers AI @ The Edge Uncover key elements for deploying AI at the Edge with AMD solutions, including how the Edge SDK accelerates development and benchmarking for AI models. TBC, Advantech |
Enhance Embedded Systems with Generative AI and local language models Explore the transformative impact of Generative AI, focusing on the integration of Large Language Models (LLMs) locally into embedded systems. Marcin Szymonek, Avnet Silica |
| 16:15-16:45 | Wrap-Up, Takeaways & Raffle Key insights from the day — plus a chance to win some cool prizes in our raffle! |
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Event in collaboration with:
We’ll be joined by our partners:
