Design HB2 Silica

Reference Design Details

Design Hub

Search Reference Designs
SubNav - Design Hub
Script Application

Smart Wireless Wall Clock based on Renesas Solution

The flexible low-density FPGA is used as a display driver to handle protocol conversions and support applications with complex encoder schemes and multi-sensor interfacing or DSP. The GreenPAK supplies the ForgeFPGA with 1.1V and the level- shifter with 1.8V and 3.3V. Additionally, our low-power Bluetooth? Low Energy (LE) 5.1 module enables communication with smart home or building systems. The light sensor ensures the clock operates correctly under various light conditions
CATEGORY
Home & building
CREATED DATE:
Viewed times
-----------User ButtonsComments----32.768kHz OscillatorCommentsOscillator------Ultra Low Power Bluetooth 5.1 SoCCommentsWireless SoC(DA14531-00000FX2)FPGA(SLG47910V)Ambient Light Sensor(ISL76682AROZ-T7)Configurable Mixed Signal(SLG46580V)Configurable Mixed Signal(SLG47528V)I2CUARTGPIOVDDIOVDDCVDDVDD1Push ButtonPush ButtonSpeakerGPIOsGPIOVin = 5V4 Digit 7 Segment LED DisplayGPIO

Would you like this design to be modifiable in the future?



PARTS IN DESIGN / BOM BY STORE

Grayed out parts are unavailable for purchase on Avnet Silica.

The displayed part lists is a small subset of the complete BOM.


MFGR PART# BLK NM

×
Modify Design

We will notify the design team. Visit the "My Designs" tab for updates when the design is available to modify. Thank you.

av-dh-disclaimer-silica

IMPORTANT NOTICE AND DISCLAIMER: AVNET PROVIDES THESE DESIGN FILES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY.  SEE LEGAL NOTICES | AVNET EMEA FOR ADDITIONAL INFORMATION.

DH Related Designs Menu
 
Smart Wireless Wall Clock based on Renesas Solution
 
DH Related Events Menu